1. Field of the Invention
Control signal generating devices for antiskid control systems utilizing a digital arithmetic unit governed by a device which converts input pulse sequences into a digital numerical value.
2. Prior Art
The device of this invention relates to a digital phase-locked loop, in particular for use in antiskid control systems for the conversion of a frequency of an input pulse sequence which is proportional to a speed into a digital numerical value utilized in a digital arithmetic unit for the purpose of operating a hydraulic control as a part of an antiskid system.
If the frequency or frequency change of an input pulse sequence is to be utilized in a digital arithmetic unit the frequency change must always be converted into a digital numerical value. Digital arithmetic units utilized in antiskid control systems require an extremely rapid conversion of momentary frequency or frequency change.
From U.S. Pat. No. 3,746,925 (assigned to the assignee of this invention), an antiskid control system is described wherein the individual periods of a constant frequency are counted by means of a fixed number of input pulses. The counting result of such an interval is predetermined by a fixed number of input pulses which permits determinations to be made with regard to the average wheel speed during the counting interval. At the same time a comparison of two subsequent intervals permits determinations with regard to the change in speed, in other words to the change in frequency of the input pulses. It is thus obvious that such a counting interval must last for several periods at the slowest frequency of the input pulse sequence. Accordingly, it takes a relatively long time before the arithmetic unit of the antiskid control system disclosed permits a determination of a suitable value and therefore a rapidly reacting, and hence exact antiskid control, is impossible with that device if only for this reason alone.
U.S. Pat. No. 3,805,089 discloses a device referred to previously above wherein with any input pulse emanating from a wheel sensor, a digital numerical value is available which is representative of the wheel speed. This is achieved by means so that upon the arrival of any input pulse the contents of a first storage register are compared with a fixed value. The difference resulting therefrom is routed to a second register which will add the difference to its contents observing the correct signs. Now the content of the second register are read into the first storage register i.e. added to the contents of the first storage register, in other words added up to the content of the first storage register with a constant high frequency. A comparison is made of the contents of the second storage register with the fixed value and at the same time the contents of the second storage register are reset or zeroed. Due to this feedback of the difference through the two storage registers the difference being ascertained by a comparator, it results that the difference corresponds to the acceleration of the wheel speed. Due to the integrating behavior of the second storage register the contents of the second storage register represents the momentary or the instant wheel speed in the form of a digital value. Thus in the device of U.S. Pat. 3,805,089, a digital value is always available which represents the speed or velocity which is corrected upon the arrival of any input pulse. With the device illustrated and described in U.S. pat. 3,805,089, there exists a decisive disadvantage in that upon a sudden locking of the wheel the frequency of the input pulse becomes zero and no comparison triggering input pulse is available at the comparator. Thus in this event it is also impossible to form any difference between the content of the first storage register and the fixed value, as a result of which the contents of the second storage register cannot be corrected. The second storage register thus would permanently feed a signal to the subsequent computing circuit which, despite the stop of the wheel, will correspond to a wheel speed which was in existence immediately before. At the same time the contents of the first storage register would continue to rise until it will overflow.